The present invention relates to a semiconductor memory device, and particularly to a programmable read-only memory (hereinafter referred to as PROM) which is made up of bipolar transistors.
In order to increase the speed of reading operation, there has been disclosed in Japanese Patent Laid-Open No. 48944/1976 (Laid-Open on April 27, 1976) a bipolar PROM which consists of bipolar transistors and which is provided with row- and column-selecting circuits consisting of emitter-coupled logic (hereinafter referred to as ECL) circuits and with row- and column-selecting circuits consisting of transistor-transistor logic (hereinafter referred to as TTL) circuits. According to this bipolar PROM, when the reading operation is to be carried out, desired memory elements are selected among a plurality of memory elements by the row- and column-selecting circuits consisting of ECL circuits. When the writing operation is to be carried out, desired memory elements are selected among the plurality of memory elements by the row- and column-selecting circuits consisting of TTL circuits. In the reading operation, desired memory elements are selected by the row- and column-selecting circuits consisting of ECL circuits. Therefore, the reading operation can be performed at high speeds.
The above-mentioned bipolar PROM, however, requires two sets of row- and column-selecting circuits and, hence, requires an increased number of elements for constituting such circuits. Therefore, the bipolar PROM tends to become bulky and consumes increased amounts of electric power.
When the bipolar PROM of a large memory capacity is to be constructed, in particular, the number of rows and columns increases in the memory array. Therefore, construction of two sets of row- and column-selecting circuits makes it difficult to realize the memory device.